Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) will feature its latest semiconductor test solutions at SEMICON Japan 2025, which will be held from Dec. 17-19 at the Tokyo Big Sight in Tokyo, Japan. At this year’s event, Advantest will highlight its broad portfolio of leading-edge test technologies for applications such as AI and high-performance computing (HPC), advanced memory, power electronics, automotive, and wireless communications.
Product and Solution Highlights
Advantest’s product display will be located in East Hall 4 at booth #E4346, featuring the company’s comprehensive portfolio of test solutions that address industry challenges in the era of complexity, including:
- Test solutions for agentic AI/HPC devices, including the V93000 EXA Scale SoC test system, the HA1200 die-level handler, System-Level Test platforms, Advantest Interconnect Solutions (AIS), and the SiConic™ solution for automated silicon validation.
- NEW cutting-edge test cell for advanced memory devices, integrating the new M5241 handler that supports high-power, high-density AI memory devices and the T5801 Ultra-High-Speed DRAM test system.
- NEW mobile and automotive test solutions, including the T2000 AiR2X air-cooled SoC and power analog test system that supports high-mix, low-volume production while doubling resource density.
- NEW scalable MTe test platform, engineered to redefine power semiconductor IC testing. Designed for next-generation wide-bandgap technologies (like SiC and GaN), MTe delivers uncompromising performance: ultra-fast signal capture, precision gate driver control, dynamic and short-circuit testing up to 10kA, flexible high-voltage digital capabilities and a compact footprint.
- Extending the V93000 test system’s capabilities to support high-volume production of silicon photonics and co-packaged optics devices via a partnership with FormFactor.
- AI-powered test solutions, such as the ACS Real-Time Data Infrastructure (ACS RTDI™), a solution platform that automates the process of converting insights into actionable production steps within the same test insertion, optimizing yield, improving quality and reducing time to market.
- NEW CD-SEM tools for testing sub-2nm semiconductor photomasks, such as the E3660, engineered for the dimensional metrology of photomasks and EUV masks.
- Solutions to enable sustainable practices, such as the Advantest Power Optimization Solution (APOS), a software designed to optimize the power management during the V93000 tester’s power-on period.
Sponsorship
Like previous years, Advantest is expressing its steadfast support for the industry as a gold-level sponsor of this year’s SEMICON Japan. Additionally, the company is sponsoring the new Advanced Packaging and Chiplet Summit (APCS), SEMI Technology Symposium (STS), AI x Sustainability x Semiconductor Summit and a student event with Mirai College.
Presentations
Beyond a product showcase, Advantest will deliver multiple presentations at APCS and STS on topics that include AI and HPC, thermal test challenges, advanced packaging and silicon photonics. In addition, Advantest is invited to speak at ATS/ITC-Asia 2025, being held in conjunction with SEMICON Japan.