The SMC 2000 family delivers DDR memory bandwidth and capacity expansion, reliability, media flexibility for next-generation CPUs and SoCs to accelerate AI and machine learning performance
The continuous computational demands of artificial intelligence (AI) and machine learning (ML) workloads, cloud computing and data analytics deployed on traditional parallel attached memory have reached an efficiency plateau due to the limitations of increased memory channels on a processor. Microchip Technology Inc. (Nasdaq: MCHP) today announces the expansion of its serial-attached memory controller portfolio with the new SMC 2000 series of Compute Express Link™ (CXL™) based Smart Memory Controllers that enable CPUs, GPUs and SoCs to utilize CXL interfaces to connect either DDR4 or DDR5 memory. This solution delivers more memory bandwidth per core, more memory capacity per core, and lowers the overall total cost of ownership in the data center by allowing modern CPUs to optimize application workloads.
The low-latency SMC 2000 16x32G and SMC 2000 8x32G memory controllers are designed to CXL 1.1 and CXL 2.0 specifications, DDR4 and DDR5 JEDEC standards and support PCIe® 5.0 specification speeds. The SMC 2000 16x32G is the industry’s highest-capacity controller with 16 lanes operating at 32 GT/s and supports two channels of DDR4-3200 or DDR5-4800, resulting in a significant reduction in the required number of host CPU or SoC pins per memory channel.
Typical CXL attached memory modules include 512 GB of memory or more, providing an effective mechanism to increase the memory bandwidth available to processing cores. This new paradigm shift provides data center operators the ability to deploy a broader range of ratios for memory to CPU cores depending on their actual application needs, resulting in improved memory utilization and lower Total Cost of Ownership (TCO).
“Microchip is excited to introduce our first CXL-based serial memory controller device to the market,” said Pete Hazen, corporate vice president of Microchip’s Data Center Solutions business unit. “We identified CXL as a disruptive technology early on and were integral to the standard’s definition. Microchip’s continued presence in the memory infrastructure market underscores our commitment to improving performance and efficiency for a broad range of SoC applications to support the increasing memory requirements of high-performance data center applications.”
“The CXL Consortium was founded with a vision to deliver to the industry an open standard that would accelerate next-generation data center performance,” said Siamak Tavallaei, president, CXL Consortium. “We’re pleased to see Microchip, a valuable contributor to the CXL Consortium, deliver a CXL solution enabling a new ecosystem for high-performance, heterogeneous computing.”
Microchip’s SMC 2000 CXL-based memory controllers employ an innovative design that delivers Reliability, Availability and Serviceability (RAS) features to transform solutions to the next level of efficiency and performance. Through CXL connectivity, the SMC 2000 external memory controller enables a CPU or SoC to utilize a broad set of media types with different cost, power and performance metrics without having to integrate a unique memory controller for each different type. For example, using an SMC 2000 controller with DDR-4 memory, advanced CPUs that only directly support DDR5 can now also re-use DDR-4 memory expansion. The dual signature authentication and Trusted Platform support, secure debug, and secure firmware update ensure the SMC 2000 CXL-based controller family also meets all critical storage and enterprise application security needs.
Data center application workloads require future memory products that can deliver the same high-performance bandwidth, low latency and reliability of today’s parallel-DDR based memory products. The CXL platform is one of the biggest industry disruptions in recent years, bringing to market a new standard serial interface for CPUs to expand memory beyond the parallel DDR interface to provide the next level of efficiency and performance to the data center.
Development Tools
To support our customers in building leading edge systems that are compliant with the CXL standard, the SMC 2000 comes with design-in collateral and our ChipLink diagnostic tool that provides extensive debug, diagnostics, configuration and analysis tools with an intuitive GUI.
Pricing and Availability
The SMC 2000 16x32G will sample to select customers in Q3CY22. For additional information, visit www.microchip.com/smartmemory. To order samples, contact a Microchip sales representative.
Resources
High-res images available through Flickr or editorial contact (feel free to publish):
- Application image: www.flickr.com/photos/microchiptechnology/52209915371/sizes/l
Additional Quotes from CXL Community
“Today’s data center requires continuous innovation across the entire compute ecosystem including memory interface technologies in order to meet the performance and scalability demands of our customers,” said Raghu Nambiar, corporate vice president, Data Center Ecosystems and Solutions at AMD. “Microchip’s new SMC 2000 utilizes CXL interfaces for memory expansion and can greatly improve system performance. We are excited to work with Microchip to deliver a cohesive memory solution for our mutual customers and propel the computer industry forward to meet these next-generation data center needs.”
“Cadence collaborated closely with Microchip on CXL verification and compliance testing, leveraging multiple Cadence Verification IP offerings to fine-tune the interconnect technology needed to advance performance for AI and HPC applications,” said Paul Cunningham, senior vice president and general manager of the System & Verification Group at Cadence. “Microchip’s release of the SMC 2000 CXL controller provides the memory bandwidth and capacity expansion required for the next generation of CPUs and GPUs to accelerate high-performance compute.”
“Dell is a strong promoter of CXL and is actively participating in the CXL Consortium and standards development. CXL provides the flexible infrastructure needed to optimize the TCO of current and emerging workloads on our future systems,” said Stuart Berke, fellow and VP at Dell. “We are excited to see Microchip’s SMC 2000 CXL-based Smart Memory Controllers enter the CXL memory ecosystem.”
“The momentum behind CXL is currently being fueled by the need for low-latency and high-bandwidth I/O solutions,” said Jim Pappas, Director of Technology Initiatives at Intel. “Microchip, with their SMC 2000 Smart Memory Controller, is a key contributor to the developing ecosystem, and we are pleased to see their investment to drive broader deployment of CXL devices and to enable rapid industry adoption.”
“As an active member of the CXL Consortium, Lenovo is committed to developing this important standard and helping build the ecosystem around the new CXL interconnect,” said Greg Huff, Chief Technology Officer, Lenovo Infrastructure Solutions Group. “We are excited to be part of developing solutions that enable a new era of data center performance and efficiency, working with Microchip to foster the growth and adoption of innovative CXL products in future Lenovo systems.”
“We strongly support the development of a rich ecosystem of innovative memory technologies that enhance system-scale capacity and performance,” said Raj Hazra, senior vice president and general manager of Micron’s Compute and Networking business unit. “CXL is a groundbreaking innovation that will open the door to composable system architecture, facilitating new ways to connect Micron’s industry-leading memory and storage.”
“Having introduced the world’s first ASIC-based CXL DRAM module, along with an open-source software toolkit, Samsung will continue to drive the commercialization of CXL products in collaboration with our customers and partners to meet the growing demand for data-heavy applications,” said Cheolmin Park, vice president of Memory Global Sales & Marketing at Samsung Electronics, and director of the CXL Consortium. “We’re delighted that Microchip’s SMC 2000 Smart Memory Controllers will be able to deliver the memory performance and capacity scaling that the data center industry needs to manage increasingly memory-intensive workloads more cost efficiently.”
“CXL memory solutions are expected to create many new opportunities in the future for the industry, with continuous emergence of more complex memory-bound future applications. It will allow customers to manage memories more efficiently through additional scaling in memory bandwidth and capacity at lower TCO. SK hynix expects that Microchip’s SMC 2000 memory controller will provide a desirable solution to satisfy such needs and accelerate expanding the overall CXL ecosystem,” said Uksong Kang, vice president of DRAM Product and Planning at SK hynix.
“SMART has designed Microchip’s SMC 2000 into our CXL E3.S Memory Module (XMM) which is being adopted in new CXL-enabled platforms,” states Satya Iyer, SMART Modular’s vice president of Specialty Memory. Iyer continues, “SMART has extensive experience launching new products based on emerging industry interconnect standards, such as OpenCAPI DDIMMs, and is now working closely with Microchip to enable XMMs as one of the CXL products in our portfolio.”
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