The global AI market is expanding at a rapid and unprecedented pace, transforming the semiconductor industry at the same time. As the demand for high-performance chips increases with the widening scope of AI applications, DIGITIMES Asia, in cooperation with Cadence and MediaTek, is set to host the 2023 Strategy+ Symposium @ Bay Area on July 19th, 2023. Titled ‘AI Ushers in the Golden age of Semiconductor industry’, the symposium will explore how the latest AI revolution changes the IC design sector in the context of generative AI, edge computing and Asia’s supply chain.
KT Moore, the vice president of Corporate Marketing at Cadence, will speak at the event about optimizing performance from chips to systems with generative AI. In a preliminary interview with DIGITIMES Asia, the Cadence VP also shares his views on AI deployment in chip design and its implications for the company.
Intelligent system design
According to Moore, Cadence already anticipated the growing role of AI in chip design approximately ten years ago. Back then, said Moore, people were already talking about data being the new oil. “We were being bombarded with large amounts of data, and data sets that were being generated by the act of doing design and doing verification,” said Moore. That was when Cadence took the first step to address the issue, as the company worked on the capabilities to handle the data, especially using the data intelligently and quickly.
Moore highlighted the company’s strategy of “Intelligent System Design”, which also encompassed being able to apply AI. Building on years of experience, Cadence is already applying AI to design flows, enabling designers to tackle bigger challenges concurrently, as opposed to the iterative process of the past.
“When designers are going through the process, they’re looking at one iteration at a time. They make a change, and then they go back and do another iteration,” said Moore. AI, according to him, significantly automates the manual process, and gives the designer more power to solve multiple problems, multiple variables, and design constraints concurrently at the same time.
“When it comes to chip design, in the early days, we used to just optimize for one variable, and it was usually the chip performance,” Moore pointed out, noting that nowadays one has to consider more variables such as power, area, thermal constraints, electromagnetic constraints, etc. “Once you start adding more of these things, it’s an exponential increase in complexity, and AI will enable fewer engineers to solve those problems,” observed Moore.
Generative AI deployed to explore larger data sets
AI, according to Moore, is basically incorporated throughout a wide range of Cadence’s product offerings. When it comes to generative AI, Moore indicated that it could help build the learning data sets. In turn, the data sets can be used to create other future designs. Generative AI also enables design teams to explore larger data sets, opening engineers up to more possibilities. “AI helps at the beginning of a project. It can help explore additional options and converge on a good optimum starting point and learn from there,” noted Moore.
Regarding analog chips, where design automation progressed at the same rate compared to that of logic ICs, Moore also sees AI having a role. “With logic designs, you’re really talking about massive data. You’re talking about billions of elements or hundreds of millions of elements that you’re trying to optimize,” explained Moore. “Typically, analog designs are not going to have as many elements as the digital designs, but they still require mathematical computation. There are still computations that the analog designer has to do manually.” According to the Cadence VP, as long as one can create a model to cover the math that goes into analog design, it can be put into a generative AI engine or an AI engine or a machine learning engine for the design process to be automated.
Hitting an inflection point
“I think we’re just at the beginning,” remarked Moore, when asked how far the industry has gone for AI to design a chip fully on its own.
“If I were to draw a graph of innovation over time, the slope would look pretty low during some periods,” said Moore, “but then we hit an inflection point when we were able to run on massive computers.” Measured by performance, massive computers made the slope “go up a little higher,” observed Moore, but in the last five years, he recognized a huge increase in what the industry can do as a result of AI.
“It’s possible that AI can design a chip, but I think we have a lot more learning to do.”
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